News

• Altera refreshes CPLD line for portables 11/12/2007

  Altera has designed its MAX IIZ CPLD to meet power, package and price demands of the portable applications market. They have up to six times the density and three times the I/O count of competing traditional ....

  Xilinx updates MicroBlaze for 32-bit FPGA-CPU-core sector 1/12/2007

  Lime Microsystems is a fabless semiconductor start-up based in the UK that has been developing transceiver technology for use with wireless standards such as WiMax. The company has announced a reference design for a MicroTCA-format card ....

  2-Mbit density FRAM 1/12/2007

  Developer of non-volatile FRAM (ferroelectric random access memory) Ramtron has extended its family of high-density FRAM devices with the FM21L16. This memory ....

  FPGA tool flow synthesises designs from Simulink 20/11/2007

  The MathWorks and Mentor Graphics have collaborated on a tool flow that provides and optimised path to take hardware description language (HDL) ....

  Embedded-FRAM chip for digital TV 19/11/2007

  Fujitsu Microelectronics has announced an embedded-FRAM (ferroelectric RAM) for digital TVs that enables simultaneous use of four-channel High-Definition Multimedia ....

  Synopsys adds Altera's Nios II processor to ASIC IP 19/11/2007

  Having recently announced a package that provides a means of putting ARM Cortex M1 cores into its ....

  Xilinx updates MicroBlaze 14/11/2007

  MicroBlaze v7 is Xilinx’ latest upgrade of its 32-bit “soft” processor core, that now includes a configurable memory management unit allowing commercial operating systems to run on the core: in the ....

  Toshiba bases new MRAM device on HDD technology 6/11/2007

  Toshiba has announced a technology that it says will be key in building high density magnetoresistive random access memory (MRAM), some researchers have long proposed as a future “universal” memory: fast, low power and non-volatile. Toshiba says it has ....

  CPLD connects two instruments with half-duty-cycle generator 1/11/2007

  When synchronizing the signals of two instruments, one must make sure that the receiver can latch the sender’s synchronous signal. For example, a pulse generator generates synchronizing pulses while generating the main pulse signal. ....

  ARM's Cortex-M1 now on Altera 1/11/2007

  ARM has announced the Cortex- M1 Development Kit for Altera Cyclone III FPGAs. Using the kit, you will be able to design the M1 core into an FPGA-based SoC (System on Chip) using mainstream tool flows from both companies: Altera’s Quartus ....

Previous   1    2    [3]    4    5    6    7    8    Next