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Reducing output-voltage noise in power supplies

MANY LDOs ON THE MARKET TODAY SUCCESSFULLY GENERATE VERY LOW OUTPUT-VOLTAGENOISE LEVELS. HOWEVER, EVEN THOSE LEVELS MAY NOT BE LOW ENOUGH FOR CERTAIN CLASSES OF APPLICATION, WHICH CAN BENEFIT FROM MORE NOISE REDUCTION THAN THE LDO ALONE PROVIDES. THIS ARTICLE DISCUSSES AND COMPARES THREE CIRCUITS THAT LOWER THE OUTPUT-VOLTAGE NOISE: TWO EMPLOY NOISE-FILTERING TECHNIQUES, AND ONE A FEED-FORWARD TECHNIQUE.

Circuits such as PLLs (phase-locked loops), ADCs and DACs (analogue-to-digital and digital-to-analogue) converters, medical instruments, and imaging sensors are often sensitive to noise coming in through the power supply and thus require a very-low-noise supply voltage. In most cases, an LDO (low-dropout linear voltage regulator) provides the noise filtering to the application.

FILTERING FOR LOW NOISE

The LDO used in the circuit of Figure 1, for example, has a noise level that never drops below 2000 nV/√Hz above 1 kHz, and is never less than 1600 nV/√Hz below 1 kHz. However, by adding an external transistor and simple lowpass RC filter, the circuit in Figure 1 reduces the supply noise by more than 46 dB and achieves a noise floor of 7 nV/√Hz at 200 Hz.

The revised circuit inserts an RC filter and transistor in the voltage regulator’s feedback loop. The R1-R2 voltage divider samples the LDO’s output voltage and is fed back to the chip’s internal error amplifier at pin 6. The error amplifier compares that voltage against its internal reference voltage and causes the output to drive Q1 in a direction that maintains voltage regulation. The RC network filters the LDO’s noisy output, resulting in a very quiet voltage at the base of transistor Q1. The result is an extremely lownoise 3.3V output.

The RC lowpass filter sets a corner frequency that fC=1/2πRC allows to calculate. It rejects frequencies above the fC at about 20 dB per decade, down to the noise floor. A high-gain npn bipolar transistor for Q1 is preferable because it keeps the base current low, thereby allowing a larger R and smaller C. Darlington transistors offer high gain but also have a higher VBE voltage, increasing the input-to-output voltage difference. A transistor with high Early voltage rejects source noise at the input.

Setting the corner frequency very low slows the regulator’s response time. The response time for load transients is much slower than that of the original LDO; thus the circuit in Figure 1 works well for steady dc loads without transients. Any load transient with energy above the corner frequency produces a transient voltage at the regulator’s output. A large output capacitor (C_OUT) helps suppress the noise that load transients induce.

The resistor, R1, limits the amount of maximum current into the base. Any changes in the load require a change in the base current. Due to the limited base current response, output response to transients is slower. The R_DS(ON) of the MAX1857 is approximately 0.24Ω. Given V_IN=5 V and base-to-ground voltage is 4V, then there is a voltage drop of 1V under worst-case conditions across the 10-kΩ base resistor. This results in a maximum current into the base of 0.1 mA. The base current multiplied by the RDS(ON) equals 24 µV (dropped across the LDO) and is negligible in the above calculation.

A plot of noise density versus frequency (Figure 2) shows the noise floor of the measuring instrument (bottom trace) and the output of Figure 1 with and without the RC filter. With the filter in place, the noise floor is about 7 nV/√Hz at 200 Hz—a noise reduction of more than 46 dB versus the unfiltered noise floor of about 2000 nV/√Hz.

ALTERNATIVE FILTERING CIRCUIT

There are many LDOs that feature lower initial noise voltages than the MAX1857. For example, the MAX8887 allows designers to add an external capacitor to bypass the internal voltage reference, which helps reduce the output- voltage noise. However, applications such as ultra-low-noise oscillators that instrumentation requires demand even lower noise levels. To achieve such levels, several low-noise components and filtering combine to produce an output-noise floor of only 6 nV/√Hz (Figure 3). The circuit is also able to respond faster to loads that have higher transient content than the circuit in Figure 1.

In Figure 3, the voltage reference (U1) has an ultra-low output-noise level, and a lowpass filter (R1 and C1) that attenuates noise frequencies above its ~0.16 Hz cutoff frequency (f_3dB) further reduces that level. The filtered reference voltage feeds the inverting terminal of an error amplifier (U2), where it regulates the output voltage via a P-channel power MOSFET (M1) and feedback resistors R2 and R3. The error amplifier’s noise current (specified at 0.5 fA/√Hz) is negligible with respect to its voltage noise. However, since the reference noise is in series with the op-amp voltage noise, they add together. The input of M1 sees a model of MOSFET noise at the input of M1.

A simplified diagram (Figure 4) is suitable for noise analysis. The noise at U2’s inverting terminal equals the noise at its non-inverting terminal:

where V_{n_OUT} is the LDO’s output noise, V_{n_REF} is the reference noise, V_{n_OPAMP} is the op amp’s input-referred noise, and H(f) is the transfer function for the R1-C1 lowpass filter. If the noise frequency of interest is well below the filter’s cutoff frequency, the reference noise is negligible, and the LDO output noise is just the op-amp noise times the closed-loop gain. The loop suppresses the MOSFET noise (V_{n_FETs}), which does not affect the output noise. For frequencies within the loop bandwidth, the LDO also rejects ripple and noise voltages that V_DD introduces.

The RC network filters the reference only and is not included in the feedback loop. This allows a faster response time to transients than the circuit in Figure 1. This is one trade-off between the two circuits: the circuit in Figure 1 has a lower noise especially at lower frequencies, but the circuit of Figure 3 allows a faster loop response. The choice of circuitry is based upon the need of the end application.

A plot of noise density versus frequency for this low-noise voltage regulator shows a noise floor of about 6 nV/√Hz at 1 kHz (Figure 5). In comparison, typical LDOs have a much higher noise density (500 nV/√Hz at 1 kHz for the MAX8887 low-noise LDO, for example). The noise floor of the measuring instrument also appears as a reference level.

FEED-FORWARD-CIRCUIT OPTION

A simple feed-forward noise-cancellation technique can reduce the supply noise by more than 26 dB, while maintaining a low input-to-output voltage drop and high power efficiency. In a feed-forward noise-cancellation scheme, the noise voltage is ac-coupled to the input of a voltage-controlled current source (Figure 6a). The noise voltage modulates the current source (gmxV_IN) such that the resulting IR drop across R_S cancels the input-noise voltage:

The feed-forward circuit in this example provides equal or better results in the lower frequency ranges than the circuits of Figure 1 and Figure 3, making it useful for the audio bandwidth. This circuit only implements noise reduction and is not a regulation circuit. Therefore, it is not part of the voltage-regulation loop and does not affect regulator performance. It could follow a switching converter and not just with a linear regulator circuit such as those in figures 1 and 3.

The voltage-controlled current source is similar to the hybrid-π small-signal model of a MOSFET or bipolar transistor. Transistors are sometimes present in the feed-forward noise-cancellation circuit, but because their parameters vary considerably from unit to unit, discrete-transistor circuits require some manual tuning to obtain a precise gm.

The circuit of Figure 6b, using the approach of Figure 6a, needs no fine-tuning. The voltage-controlled current source employs a low-noise op-amp and an N-channel MOSFET, and produces a gm value precisely equal to 1/R₁.

The value of R_S must be such that the voltage drop across the resistor is small at the maximum output current (a voltage drop of 50 to 200 mV across R_S is acceptable). R₁ and R_S must be equal in value and well-matched, so a tolerance of 1% or better is recommended. RS must be able to dissipate the power at maximum current.

Next, the quiescent current for M1 should equal the maximum noise voltage divided by R_S:

V_Q is the quiescent voltage at the op amp’s non-inverting terminal, obtained from the voltage divider R₃-R₆:

where R₃ >> R₄.

The circuit in Figure 6b assumes that the maximum noise voltage is 1 mV_Pk-Pk: therefore, I_Q is 10 mA and V_Q 1 mV. Note that the rejection capability degrades if the noise voltage exceeds 1 mV_Pk-Pk when V_Q is 1 mV. V_Q should therefore be set equal to the maximum anticipated noise voltage. To ensure that V_Q is unaffected by bias current, choose an op amp with low input-bias current.

The ac-coupling capacitor (C₁) should be large enough to couple broadband noise into the op amp. During power-up, while C₁ is charging, the current through R₁ and M1 is larger because V_Q is higher than normal. R₂ is therefore present to limit the current through M1 during power-up:

where V_DSM1 is the drain-source voltage of M1.

With a load current of 1A, the noise rejection versus frequency for the circuit in Figure 6b is better than 26 dB at lower frequencies and better than 18 dB within the audiofrequency range (Figure 7). Noise rejection decreases at higher frequencies, but the higher frequency noise is easier to filter with a capacitor (C₂ in this circuit).

AUTHOR’S B IOGRAPHY

Kevin Frick is customer-application engineer and member of the technical staff at Maxim Integrated Products. He joined the company in 2003 and holds both a master’s and a bachelor’s degree in electrical engineering from North Carolina State University. You can reach him at Kevin_Frick@maximhq.com.