<allow-access-from domain="cde.cerosmedia.com" /><allow-access-from domain="admin.cerosmedia.com" /><allow-access-from domain="test.cerosdevelopment.com" />EDN Europe - EDA/ IPhttp://www.edn-europe.comEDN Europe - EDA/ IPen-USCopyright 2010 Reed Business Information, a division of Reed Elsevier Inc. All rights reserved.Fri, 12 Mar 2010 06:45:48 +0800Reconfiguring figures in FPGA programmes for 2010http://www.edn-europe.com/reconfiguringfiguresinfpgaprogrammesfor2010+article+3870+Europe.htmlNext-generation announcements have appeared from three FPGA vendors over a short period – from the two leaders in the sector, and from a new entrant – and all feature, to a greater or lesser extent, dynamic ....http://www.edn-europe.com/reconfiguringfiguresinfpgaprogrammesfor2010+article+3870+Europe.htmlMon, 1 Mar 2010 00:00:00 +0800National opts for familiar outline for DC/DC moduleshttp://www.edn-europe.com/nationaloptsforfamiliaroutlinefordcdcmodules+article+3783+Europe.htmlNational Semiconductor has entered the market for highly-integrated power modules with a range of step-down dc/dc converters in a new package. Some ....http://www.edn-europe.com/nationaloptsforfamiliaroutlinefordcdcmodules+article+3783+Europe.htmlMon, 25 Jan 2010 00:00:00 +0800LFoundry to buy Atmel’s Rousset, France, wafer fabhttp://www.edn-europe.com/lfoundrytobuyatmelsroussetfrancewaferfab+article+3693+Europe.htmlLFoundry, the mixed-signal foundry based in Landshut, near Munich, has announced its intention to purchase Atmel’s ....http://www.edn-europe.com/lfoundrytobuyatmelsroussetfrancewaferfab+article+3693+Europe.htmlFri, 18 Dec 2009 00:00:00 +0800Thermal simulation simplifies avionics heatsink designhttp://www.edn-europe.com/thermalsimulationsimplifiesavionicsheatsinkdesign+article+3686+Europe.htmlWhen designers calculate the thermal budget for their projects, and conclude that they require an external heatsink, in most cases they know how their product will be oriented respect to gravity. A conventional ....http://www.edn-europe.com/thermalsimulationsimplifiesavionicsheatsinkdesign+article+3686+Europe.htmlFri, 11 Dec 2009 00:00:00 +0800Synopsys adds automated synthesis flow from Matlab’s “M” to RTLhttp://www.edn-europe.com/synopsysaddsautomatedsynthesisflowfrommatlabsmtortl+article+3512+Europe.htmlSynopsys has introduced a logic synthesis flow that begins with algorithmic descriptions written in M language, and provides a route to implementation ....http://www.edn-europe.com/synopsysaddsautomatedsynthesisflowfrommatlabsmtortl+article+3512+Europe.htmlThu, 8 Oct 2009 00:00:00 +0800Online tools compile and download code for Coretex M3 MCUshttp://www.edn-europe.com/onlinetoolscompileanddownloadcodeforcoretexm3mcus+article+3434+Europe.htmlARM and NXP have announced a collaboration that will provide designers with an on-line platform for rapid ....http://www.edn-europe.com/onlinetoolscompileanddownloadcodeforcoretexm3mcus+article+3434+Europe.htmlMon, 21 Sep 2009 00:00:00 +0800Cypress extends PSoC with ARM & 8051 coreshttp://www.edn-europe.com/cypressextendspsocwitharm8051cores+article+3421+Europe.htmlCypress Semiconductor designed its PSoC (programmable system-on-chip) devices to contain all of the functional blocks of a small embedded system; a ....http://www.edn-europe.com/cypressextendspsocwitharm8051cores+article+3421+Europe.htmlMon, 14 Sep 2009 00:00:00 +0800Akya reveals dynamically reconfigurable logic technologyhttp://www.edn-europe.com/akyarevealsdynamicallyreconfigurablelogictechnology+article+3100+Europe.htmlAkya is a UK-based start-up that is offering IC-designers IP (intellectual property) to include reconfigurable logic on their ASSPs or ASICs; Akya (say; ....http://www.edn-europe.com/akyarevealsdynamicallyreconfigurablelogictechnology+article+3100+Europe.htmlThu, 28 May 2009 00:00:00 +0800Cadence links FPGA pin allocation to PCB layout toolshttp://www.edn-europe.com/cadencelinksfpgapinallocationtopcblayouttools+article+3068+Europe.htmlDesigners who use today’s large FPGAs on their PCB face an increasing problem handling the pin-out and board tracking around the packages of those programmable devices. The FPGAs have large, sometimes ....http://www.edn-europe.com/cadencelinksfpgapinallocationtopcblayouttools+article+3068+Europe.htmlWed, 20 May 2009 00:00:00 +0800Synopsys merges IC layout and verification toolshttp://www.edn-europe.com/synopsysmergesiclayoutandverificationtools+article+3042+Europe.htmlA continuing theme of developments in IC-design tools is that EDA companies combine or integrate successive steps of their design flow. It has almost become a flow in itself; the first stage of that flow ....http://www.edn-europe.com/synopsysmergesiclayoutandverificationtools+article+3042+Europe.htmlMon, 11 May 2009 00:00:00 +0800