<?xml version="1.0" encoding="iso-8859-1"?> <!DOCTYPE cross-domain-policy SYSTEM "http://www.macromedia.com/xml/dtds/cross-domain-policy.dtd"><rss version="2.0"><cross-domain-policy>&lt;allow-access-from domain="cde.cerosmedia.com" /&gt;&lt;allow-access-from domain="admin.cerosmedia.com" /&gt;&lt;allow-access-from domain="test.cerosdevelopment.com" /&gt;</cross-domain-policy><channel><title>EDN Europe - High-Speed Design</title><link>http://www.edn-europe.com</link><description>EDN Europe - High-Speed Design</description><language>en-US</language><copyright>Copyright 2010 Reed Business Information, a division of Reed Elsevier Inc. All rights reserved.</copyright><pubDate>Tue, 16 Mar 2010 18:38:41 +0800</pubDate><item><title>Research project aims to “green” the internet</title><link>http://www.edn-europe.com/researchprojectaimstogreentheinternet+article+3755+Europe.html</link><description>A group of 15 organisations drawn from across the IT and networking industries, and inspired by a study initially conducted at Bell Labs, comprise the founding members of the &amp;lt;a href=''http://www.greentouch.org'' ....</description><guid>http://www.edn-europe.com/researchprojectaimstogreentheinternet+article+3755+Europe.html</guid><pubDate>Tue, 12 Jan 2010 00:00:00 +0800</pubDate></item><item><title>12-bit, 1-Gsample/sec ADC is industry first, says Texas Instruments</title><link>http://www.edn-europe.com/12bit1gsamplesecadcisindustryfirstsaystexasinstruments+article+3548+Europe.html</link><description>Texas Instruments has introduced an analogue-to-digital converter with 12-bit resolution at a sample rate of 1 Gsample/sec; this amounts to a doubling of ....</description><guid>http://www.edn-europe.com/12bit1gsamplesecadcisindustryfirstsaystexasinstruments+article+3548+Europe.html</guid><pubDate>Tue, 27 Oct 2009 00:00:00 +0800</pubDate></item><item><title>144-Mbit SRAM chips run at 550 MHz</title><link>http://www.edn-europe.com/144mbitsramchipsrunat550mhz+article+3520+Europe.html</link><description>Designers who need the fastest-available memory for applications such as the data paths in high-speed communications and networking now have a new device-density to work with; &amp;lt;a href=''http://www.cypress.com'' ....</description><guid>http://www.edn-europe.com/144mbitsramchipsrunat550mhz+article+3520+Europe.html</guid><pubDate>Wed, 14 Oct 2009 00:00:00 +0800</pubDate></item><item><title>Synopsys adds automated synthesis flow from Matlab’s “M” to RTL</title><link>http://www.edn-europe.com/synopsysaddsautomatedsynthesisflowfrommatlabsmtortl+article+3512+Europe.html</link><description>Synopsys has introduced a logic synthesis flow that begins with algorithmic descriptions written in M language, and provides a route to implementation ....</description><guid>http://www.edn-europe.com/synopsysaddsautomatedsynthesisflowfrommatlabsmtortl+article+3512+Europe.html</guid><pubDate>Thu, 8 Oct 2009 00:00:00 +0800</pubDate></item><item><title>Multi-core, multithreaded processor supports “green radio”</title><link>http://www.edn-europe.com/multicoremultithreadedprocessorsupportsgreenradio+article+3502+Europe.html</link><description>Under the banner of “Green Radio”, the IMEC research centre (Leuven, Belgium) has announced that the IP (intellectual property) for its second generation ....</description><guid>http://www.edn-europe.com/multicoremultithreadedprocessorsupportsgreenradio+article+3502+Europe.html</guid><pubDate>Tue, 6 Oct 2009 00:00:00 +0800</pubDate></item><item><title>SuperSpeed USB Test Suite</title><link>http://www.edn-europe.com/superspeedusbtestsuite+article+3393+Europe.html</link><description>LeCroy has announced what it terms a “single-source lineup” of test instruments to support the USB (Universal Serial Bus) 3.0 standard, also known as ....</description><guid>http://www.edn-europe.com/superspeedusbtestsuite+article+3393+Europe.html</guid><pubDate>Wed, 2 Sep 2009 00:00:00 +0800</pubDate></item><item><title>Renesas offers design environment for SiPs</title><link>http://www.edn-europe.com/renesasoffersdesignenvironmentforsips+article+3234+Europe.html</link><description>Renesas Technology has announced its SiP Top-Down Design Environment for system-in-package (SiP) products combining multiple chips. It uses a top-down ....</description><guid>http://www.edn-europe.com/renesasoffersdesignenvironmentforsips+article+3234+Europe.html</guid><pubDate>Tue, 14 Jul 2009 00:00:00 +0800</pubDate></item><item><title>500 Msample/sec, 12-bit digitiser</title><link>http://www.edn-europe.com/500msamplesec12bitdigitiser+article+3233+Europe.html</link><description>Spectrum’s M3i.3240 is, its makers say, the fastest monolithic 12-bit A/D converter available. It uses one dedicated ADC per channel ....</description><guid>http://www.edn-europe.com/500msamplesec12bitdigitiser+article+3233+Europe.html</guid><pubDate>Fri, 10 Jul 2009 00:00:00 +0800</pubDate></item><item><title>Akya reveals dynamically reconfigurable logic technology</title><link>http://www.edn-europe.com/akyarevealsdynamicallyreconfigurablelogictechnology+article+3100+Europe.html</link><description>Akya is a UK-based start-up that is offering IC-designers IP (intellectual property) to include reconfigurable logic on their ASSPs or ASICs; Akya (say; ....</description><guid>http://www.edn-europe.com/akyarevealsdynamicallyreconfigurablelogictechnology+article+3100+Europe.html</guid><pubDate>Thu, 28 May 2009 00:00:00 +0800</pubDate></item><item><title>Cadence links FPGA pin allocation to PCB layout tools</title><link>http://www.edn-europe.com/cadencelinksfpgapinallocationtopcblayouttools+article+3068+Europe.html</link><description>Designers who use today’s large FPGAs on their PCB face an increasing problem handling the pin-out and board tracking around the packages of those programmable devices. The FPGAs have large, sometimes ....</description><guid>http://www.edn-europe.com/cadencelinksfpgapinallocationtopcblayouttools+article+3068+Europe.html</guid><pubDate>Wed, 20 May 2009 00:00:00 +0800</pubDate></item></channel></rss>
