ICs will output eye data from signal paths buried inside silicon packages
EDN Europe, 21 Jan 2008
Vitesse Semiconductor has announced a technology, and will shortly introduce a product that employs it, to embed an “oscilloscope” function into high-speed data communications ICs, that will give you a waveform-viewing capability within the signal path of a chip. At the high speeds of today’s serial data chips, the distance between the pin or pad connecting the IC to the PCB or backplane becomes significant; you can probe the pin with a fast ‘scope but that only tells you what the waveform is at the pin, not what the internal functional blocks of the chip are seeing. Also, many chips – those from Vitesse’s existing range among them – have adjustable equalisation functions connected to the individual signal pins. Today, you might set up those functions by looking at the overall performance of the circuit. You can probe the incoming signal , you might conclude from the waveform eye something about the equalisation you need to apply to the signal before it reaches, say, clock-and-data-recovery (CDR). You can’t see the waveform at the CDR block’s input, so your only alternative is to set up a likely equalisation configuration, then look at some parameter – bit-error-rate, perhaps – of the signal flow through the whole chip, and make adjustments to the equalisation parameters to optimise that measurement. In forthcoming products, Vitesse will add a feature it calls Vscope. An output from the chip will allow you to select any input and see, using a software package running on a PC, the eye-diagram of the “real” signal at that point within the chip. To receive logic-level data, and to discriminate between a 1 and a 0, the ICs employ a sampling approach. Adding (the company says) minimal overhead, Vitesse uses that sampling circuit as, in effect, the sampling “head” of a “virtual” oscilloscope – a little extra hardware and the accompanying software package reconstructs a waveform view from the samples. Like any sampling ‘scope, this is not a means of tracking the data waveform in real-time – it just depicts the eye-diagram of the aggregate bit pattern. As well as giving an insight into the waveform for circuit-development, diagnostic and maintenance purposes, the feature also offers the possibility to dynamically optimise equalisation parameters with some sort of microcontroller-based control loop using the eye-diagram data; you could conceive of a backplane receiver that re-configured itself when the user swaps a pcb, for example. Evaluation boards will be available in the second quarter of 2008 – more when Vitesse follows this announcement with a product release.