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Synopsys releases SystemC-model library

Synopsys is broadening its DesignWare silicon and verifi cation-IP (intellectual- property) portfolio with the DesignWare systemlevel library, a group of SystemC transaction-level models. This introduction signals a change in the company’s attitude: Synopsys once backed SystemC’s main rival, SystemVerilog, and acquired that software’s inventor, CoDesign. In the 1990s, when CoWare (www.coware.com) introduced SystemC, Synopsys embraced it, co-founded the OSCI (Open SystemC Initiative, www.systemc. org), and contributed an open-source simulator to the organization. Markus Willems, product-marketing manager for system-level solutions at Synopsys, acknowledges that the company shifted its focus toward SystemVerilog and away from SystemC as a next-generation language. He emphasizes that Synopsys did not abandon SystemC, however. The company has for many years supported the language in its simulation line-up. “With the upswing of the transaction-level-modeling concept … the market’s become highly interesting to Synopsys,” he says. “Now, the concept of building virtual platforms for prehardwareoftware development is coming to maturity, and the market is requesting a SystemCbased solution.”

Attesting to the focus on SystemC, Synopsys two years ago acquired Virtio and its Virtual Platform technology, which allows design groups to create a transaction-level virtual prototype of a device. The groups then send one copy of the prototype to hardware designers to begin the hardware design and another to software groups to develop fi rmware, an operating system, drivers, and applications for the platform. The technology’s most notable success has been with Texas Instruments (www.ti.com), which uses the tool to create architecture derivatives of its OMAP (Open Multimedia Applications Platform). Originally, Virtio developed a proprietary transaction-level model for customer platforms but supported SystemC. However, customers are now opting for SystemC over other types of transaction-level models. With DesignWare, Synopsys hopes to help Virtio customers build platforms more quickly and assist companies using SystemC models with developing their own architectures, because the models work with any IEEE 1666 SystemCcompliant simulators.

The library comprises SystemC transaction models of commonly used IP blocks and functions. It includes ARM7- TDMI, ARM920T, ARM926EJS, ARM946E-S, ARM-1136- JFS, and ARM1176JZFS processor models; ARM AMBA (Advanced Microcontroller Bus Architecture), AHB (advanced high-performance bus), and AMBA APB (advanced peripheral bus); peripherals; a UART interface; an interrupt controller; and an I2C interface. Synopsys has also added several models of its DesignWare cores, including models for USB 2.0, High Speed OTG (On-The-Go), SATA (serial advanced-technology attachment), and AHCI (advanced host-controller interface). The library also comprises platforms combining these functions with others. Preassembled platforms include the VPMP (virtual-platformmultimedia- player) demo, the VPAI (virtual platform for ARM integrator), the VPQSML (virtual- platform quick-start multilayer), and the VPTest (virtualplatform test).

Traditionally, Synopsys has drawn revenue from creating these models for customers such as TI. The new library functions will allow customers to fi ll most of their platforms with models from the library, but Willems believes that customers will still likely hire Synopsys services to model unique logic functions in their designs or functions that the library lacks.

Synopsys, www.synopsys.com.